Gurantor department | Department of Telecommunications | Credits | 5 |

Subject guarantor | doc. Ing. Jaroslav Zdrálek, Ph.D. | Subject version guarantor | doc. Ing. Jaroslav Zdrálek, Ph.D. |

Study level | undergraduate or graduate | Requirement | Compulsory |

Year | 1 | Semester | winter |

Study language | English | ||

Year of introduction | 2019/2020 | Year of cancellation | |

Intended for the faculties | FEI | Intended for study types | Bachelor |

Instruction secured by | |||
---|---|---|---|

Login | Name | Tuitor | Teacher giving lectures |

NEV05 | Ing. Pavel Nevlud | ||

ZDR20 | doc. Ing. Jaroslav Zdrálek, Ph.D. |

Extent of instruction for forms of study | ||
---|---|---|

Form of study | Way of compl. | Extent |

Full-time | Credit and Examination | 2+2 |

Combined | Credit and Examination | 8+8 |

The goal of the subject is to present to students the digital systems and their realization with gates and finite state machines, representation of numbers and glyphs, basic algorithms for arithmetic operations in digital systems.

Lectures

Tutorials

Experimental work in labs

Project work

Introduction to the hardware realization of digital systems - logic, Boolean algebra and functions, gates, latches and flip flops, combinational and sequential circuits, finite state machine, properties basic circuits as multiplexers, decoders, registers, counters, adders.
Introduction to representation of information in the digital systems - numeral number systems with any radix, importance of binary and decimal numeral systems, binary and hexadecimal arithmetic operations, representation of glyphs and characters, ASCII code, UNICODE, representation of integer and real numbers.

Zdrálek,J., Chmelíková,Z.:
Wakerly J. F.: Digital Design, Principles and Practices; Prentice Hall 2006; ISBN 0-13-186389-4
Katz R. H. and Borriello G.: Contemporary logic design; Prentice Hall 2005; ISBN 0-201-30857-6
Roth Ch. H. Jr.: Fundamentals of logic design; Thomson Brooks/Cole 2004; ISBN 0-534-37804-8

Wakerly J. F.: Digital Design, Principles and Practices; Prentice Hall 2006; ISBN 0-13-186389-4
Katz R. H. and Borriello G.: Contemporary logic design; Prentice Hall 2005; ISBN 0-201-30857-6
Roth Ch. H. Jr.: Fundamentals of logic design; Thomson Brooks/Cole 2004; ISBN 0-534-37804-8
Svoboda A. and White D. E.: Advanced logical circuit design techniques; Garland StPM Press 1979; ISBN 0-8240-7014-3
Bhasker J.: VHDL Primer, Third Edition; Prentice Hall 1999; ISBN 0-13-096575-8

Projects.
Tests.
Activities.
Final exam will be by test and oral form.

Knowledge of programming language C or C++, design flowchart of program.

Subject has no prerequisities.

Subject has no co-requisities.

Lectures:
• Logic, Boolean algebra, Boolean functions and their representation, numeral systems – positional system, conversion of integer numbers.
• Definition of basic forms for two level logic network, canonical forms, minimization based on Boolean algebra and Karnaugh maps, introducing computer algorithm for minimization (McCluskey, Expesso, ...)
• Gates and corresponding operations, logical signals and their active levels, design logical network, realization based on combination AND-OR, OR-AND, NAND-NAND, NOR-NOR.
• Positional numeral systems and conversation between them, integer and real numbers, connection between binary, octal and hexa numeral system.
• Representation integer numbers – sign-and-magnitude method, ones‘ and two’s complement, offset binary, arithmetic operations – addition, subtraction, multiplication and division, flags negate (N), zero (Z), overflow (V) and carry (C).
• Realization of binary arithmetic addition and subtraction, ripple-carry adder, carry-lookahead adder, multiplication, division and their basic hardware realization.
• Representation real numbers, fixed point numbers, Qm.n format, floating point numbers according to IEEE 754-2008, arithmetic operations, program implementation of multiplication and division, flags of operations.
• Representation glyphs, characters, ASCII code, Unicode, UTF algorithms.
• Representation real and integer numbers in BCD code, arithmetic operation – addition.
• Asynchronous RS latch, synchronous D, T, JK flip-flops.
• FSM – finite state machine, automata with finite state, definition of behaviour, possibility of description – graphic and software.
• Digital synchronous system – control and data unit, realization of control unit – D flip-flops, microprogramming control unit, example.
• Technology of digital circuits – bipolar TTL, unipolar CMOS, electric properties of gates, log values 0/1 and levels L/H, open collector, three state logic and buses.
Practical lesson
• Introduction, conversion form decimal to binary and hexa numeral systems, Boolean algebra, entering the first project.

Conditions for completion are defined only for particular subject version and form of study

Academic year | Programme | Field of study | Spec. | Form | Study language | Tut. centre | Year | W | S | Type of duty | |
---|---|---|---|---|---|---|---|---|---|---|---|

2019/2020 | (B2647) Information and Communication Technology | P | English | Ostrava | 1 | Compulsory | study plan | ||||

2019/2020 | (B2647) Information and Communication Technology | K | English | Ostrava | 1 | Compulsory | study plan | ||||

2019/2020 | (B0714A060011) Telecommunication technology | P | English | Ostrava | 2 | Compulsory | study plan | ||||

2019/2020 | (B0613A140010) Computer Science | P | English | Ostrava | 1 | Compulsory | study plan | ||||

2019/2020 | (B0541A170009) Computational and Applied Mathematics | P | English | Ostrava | 1 | Compulsory | study plan | ||||

2019/2020 | (B0714A060009) Mobile technology | P | English | Ostrava | 2 | Compulsory | study plan |

Block name | Academic year | Form of study | Study language | Year | W | S | Type of block | Block owner |
---|