454-0315/01 – Micro-electronic Circuit Technology (TMO)
| Gurantor department | Department of Telecommunications | Credits | 8 |
| Subject guarantor | Ing. Radek Novák, Ph.D. | Subject version guarantor | Ing. Radek Novák, Ph.D. |
| Study level | undergraduate or graduate | Requirement | Optional |
| Year | 1 | Semester | summer |
| | Study language | Czech |
| Year of introduction | 2003/2004 | Year of cancellation | 2009/2010 |
| Intended for the faculties | FEI | Intended for study types | Follow-up Master |
Subject aims expressed by acquired skills and competences
Understand the technology of production of electronic modules applied for the various units.
Learning outcomes are set so that the students are able to identify and apply technology tasks in the field of microelectronic circuits.
Teaching methods
Summary
Subject is concern in initial materials and integrated structure manufacturing technology production and Integrated circuits, principle for three-dimensional bipolar and unipolar structure ordering, also considering resulting peripheral characteristics, automated design resources and its verification.
Compulsory literature:
Texas Engineering Extension Service,Texas University Systém, College Station, Texas 1997,Silicon Materials Fabrication-Introduction and Review of Fundamental Concepts, Crystal Growth, Wafer Preparation, Epitaxial Deposition, Chemical Vapor Deposition, Oxidation/Diffusion, Wet Processes, WetDry Etch, CMP-Chemical Mechanical Polishing
Colclaser, R.A.: Micro-Electronics Processing and Device Design, The University of New Mexico, JW and S.,N.Y.,1997
Botkar, K.R.: Integrated Circuits, Indian Institute of Science, Bangalore 1997
Einspruch, N.G.; Larrabee,G.B.: VLSI Electronics Microstructure Science, TI Dallas, Texas,Academic Press,1983
Wolf, S.; Tauber,R.N.: Silicon Processing for the VLSI ERA-Process Technology, Lattice Press,Sunset Beach, 1990
Gray, P.R.; Meyer,R.G.: Analysis and Design of Analog Integrated Circuits,University of California, Berkeley, JW and S.,N.Y.,1997
Dekker, M.: Handbook of Semiconductor Manufacturing Technology, ISBN: 0-8247-8783-8, Inc.,2000.
Dekker, M.: Microlithography Fundamentals in Semiconductor Devices and Fabrication Technology, ISBN: 0-8247-9951-8, Inc.,2000.
Fy.Literature: Wacker Siltronic-Wafers for the World of Microchips, 2000.
Schroder, D.K.: Semiconductor Material and Device Characterization, Arizona State University, Tempe, Arizona, JW and S.,N.Y.,1999
Recommended literature:
Additional study materials
Way of continuous check of knowledge in the course of semester
Conditions for credit:
Fullfilling of Project 1 and Project 2.
E-learning
Other requirements
Prerequisities
Subject has no prerequisities.
Co-requisities
Subject has no co-requisities.
Subject syllabus:
Lectures:
Materials for ICs. Crystal growth. Zonal rafination.
Epitax growth.
Oxidation, difussion.
Iont implantation.
Photolitography.
Plasma etching. Phyzical deposition of metalic lays.
Lays etching.
Contamination of boards, cleaning.
Monolithic rezistors, capacitors.
Technology COSMOS.
Rule for design in bipolar struktures.
Example of tranzistoru NPN design. Test struktures.
Realization of tranzistor N MOS.
Metodology of design ICs, CAD devices (Cadence, Spice, Verilog). Modeling.
Exercises:
Difusion - matematical model, pressure and temperature dependence, calculation of depth of lay.
Laboratories:
Organization of laboratory exercises at firm ON-Semiconductor, Rožnov pod Radhoštěm.
Properties of lays oxid and nitrid Silicium, created by LPCVD and PECVD technology .
Charakterization Si epitax lay with using CV plotter with probe SSM 495.
Analyzis of rest atmosfera in sputtering agregat LLS801.
Measuring parameters AL alloys on test Si boards.
Microhardness measuring of sputtered lay.
Measuring of etch speed PECVD nitrid-rezist on test Si boards.
Measuring of reproducebility etch speed in agregat TEGAL901e.
Comparisn strip speeds of rezist on barelovém a singledesk agregat.
Modeling of concentration profil and lay-rezistance of lays created by difusion and iont implantation.
Measuring of specific parameters - test structures on Si board.
Modeling of function bipolar tranzistor using simulator.
Method CV(Standard Capacitance-Voltage).
Influence of expozition and thick of lay.
Projects:
Project No.1 Complete description of bipolar technology.
Project No.2 Complete description of unipolar technology.
Conditions for subject completion
Occurrence in study plans
Occurrence in special blocks
Assessment of instruction
Předmět neobsahuje žádné hodnocení.